A liquid crystal display (LCD) is a flat display with properties of low power consumption, low significantly, space occupation and weight in comparison with a conventional cathode ray tube (CRT) and without curve surface as a CRT display has. Hence, the liquid crystal display has widely been applied in all sorts of merchandises, including consumptive electronic products, such as pocket calculators, electronic dictionaries, watches, mobile phones, portable notebooks, communication terminals, display panels, desk-top personal computers, and even high dpi (dots per inch) television (HDTV) and so on. The most popular display is an active-type thin film transistor liquid crystal displays (TFT-LCD) due to the fact that the viewing angle, response time and the contrast performance are much better than that passive type LCD.
For a long term, amorphous silicon is a main material for TFT manufacture in TFT-LCD device. However, nowadays, another choice is provided, forming transistor using polysilicon is found superior to amorphous silicon. The low temperature polysilicon type TFT-LCD (LPTFT-LCD) may even become a main stream due to the better performance of carrier mobility in polysilicon than in amorphous. Another advantage of LPTFT-LCD had is the driving circuit can be formed simultaneously with the pixel TFT fabrication Therefore, LPTFT-LCD can provide a faster switched speed than other types LCD.
Certainly, LTPS TFT-LCD has some drawbacks need to be overcome. For instance, the device usually has a rather large leakage current during TFTs turn off. To overcome this defect, Inoue et al. proposed a concept of dual gate TFT structure to inhibit the problem of leakage current, as described in the U.S. Pat. No. 5,693,959. Another method is provided by Ha et al. in the U.S. Pat. No. 5,940,151; the patent provides lightly doped drain (LDD) technique to alleviate the leakage current problem.
The present invention concentrates to the dual gate structure of TFTs. FIG. 1A is a top view of the dual gate structure of TFTs, and FIG. 1B is a cross-sectional view along cut-line a-a′ of FIG. 1A. The numeral 909 is denoted a polysilicon layer, which is formed to constitute a heavily doped source region 909a, a lightly doped source region 909b, a first channel 909c, a lightly doped region 909d, which is in between dual gate, a second channel 909d, a second channel 909e, a lightly doped drain region 909f, and a heavily doped drain region 909g. The scan line 903 includes dual gates, one over the first channel 909c and the other over the second channel 909e. The signal line 904 usually made of aluminum is contacted to the heavily doped source region 909a through source contact 910. The drain metal line is connected to a transparent conductive electrode by means of through-hole 913 and drain contact 911 to the heavily doped drain region 909g. 
The forgoing dual gate provided two gates in parallel and formed along the scan line. Unfortunately, in the design of color filter layout, the primary colors: red, blue, and green are usually along scan line. As a result, the resolution of display will suffer some limits. Since, the total lengths of two channel 909c, 909e and the interval in between 909d will be restricted owe to the constraints of lithographic machine for TFT. Since the problem of the pixel is crowded along scan line direction. However, there is no such problem along the data line. Three sub-pixels for three primary colors are not along this direction. By contrast, it provides more process windows. Subsequently, an object of the present invention is to provide a method, which is to reshuffle the positions of the dual gate. Some or part of the loadings of dual gate on the scanning line is shared by the signal line and thus solve the forgoing problem.